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Functions in VHDL

Posted by PRABHAKARAN Saturday, March 6, 2010

A function executes a sequential program and returns a single value to a calling program. A function may be used any place an expression may be used.

General form:

FUNCTION func_name(formal parameter list)
RETURN return_type IS
-- Declarative part
-- declarations of variables or constants go here
BEGIN
{sequential statements}
RETURN return_value;
END func_name;

Parameters are inputs to the function and may not be changed by the function. Therefore, they can not appear on the left side of an assignment statement.

Function example

-- This function performs a logical shift left on a std_logic_vector.
FUNCTION lsl(in1: std_logic_vector(3 downto 0))
RETURN std_logic_vector IS
Variable d: std_logic_vector(3 downto 0);
BEGIN
FOR i IN 0 TO 2 LOOP
d(i + 1) := in1(i);
END LOOP;
d(0) := ‘0’;
RETURN d;
END lsl;

The function definition may be placed in the declarative part of the Architecture. To call the function a statement such as the following can be used:

q <= lsl(b);

This statement would be located after the BEGIN statement in the Architecture. It can also be located within a PROCESS.

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